The present invention generally relates to a data receiver that receives serial data of differential input signals based on a low voltage differential signaling (LVDS) standard and outputs serial data of a single-ended output signal, and a fail-safe circuit that is used in the data receiver, and detects whether or not the differential input signals have nonstandard small amplitude.
The LVDS is a serial interface technique for transmitting data at a high speed from a data transceiver to a data receiver. In a data transmission system using the LVDS, serial data of differential output signals based on an LVDS standard is transmitted from the data transceiver to the data receiver. In the data receiver, serial data of differential input signals transmitted from the data transceiver is received, converted into serial data of a single-ended output signal, and supplied to a processing circuit which processes the serial data.
In a data reception circuit for the LVDS, in a case where differential input signals with nonstandard small amplitude not based on the predetermined amplitude of the LVDS standard are received (in other words, when a failure occurs in the amplitude of the differential input signals), a fail-safe function is needed.
JP 2010-34733 A discloses a squelch detection circuit. The squelch detection circuit includes a peak detection circuit and a pulse width extending circuit. When the potential amplitude of received differential signals exceeds a predetermined value, the peak detection circuit outputs a voltage signal corresponding to a difference between the differential signals, outputs a shift reference voltage obtained by level-shifting an intermediate potential between first and second reference voltages, compares the voltage signal with the shift reference voltage, and outputs a detection signal thereof as a pulse. The pulse width extending circuit extends the pulse width of the detection signal by at least one period of the differential signals.